verilog, 201 bytes

Result

WA

Duration

476ms

Code [DL]

module c;time z,a[12];
initial for(i=12;i;i--){
$fscanf(1<<31,"%d",a[i])
if(i<10)a[i]-=a[10+i%3]
}
$write((a[9]*(a[5]*a[1]-a[4]*a[2])+a[8]*(a[4]*a[3]-a[6]*a[1])+a[7]*(a[6]*a[2]-a[5]*a[3]))/6)
endmodule

stdin

57 94 76
01 47 21
73 56 12
42 51 64

stdout

stderr

/volume/CODE:1: warning: Use of SystemVerilog [size] dimension. Use at least -g2005-sv to remove this warning.
/volume/CODE:4: syntax error
I give up.
/bin/script: line 14: /tmp/code: not found
rm: can't remove '/tmp/code': No such file or directory

strace