verilog, 224 bytes

Result

WA

Duration

502ms

Code [DL]

module z;integer a,b,c,d,e,f,g,h,i,j,k,l,z;initial begin z=$fgets("%d%d%d%d%d%d%d%d%d%d%d%d",a,b,c,d,e,f,g,h,i,j,k,l);d-=a;e-=b;f-=c;g-=a;h-=b;i-=c;j-=a;k-=b;l-=c;$write((g*k*f+j*e*i+d*h*l-j*h*f-d*k*i-g*e*l)/6);end endmodule

stdin

07 48 38
78 29 96
30 85 94
02 77 81

stdout

ERROR: /volume/CODE:1: $fgets's first argument must be a reg.
ERROR: /volume/CODE:1: $fgets takes two arguments.
                       Found 11 extra arguments.

stderr

strace