Result

WA

Code [DL]

module a;
	integer c,i,j,x,y;
	initial begin
		for (i=0;i<10;i=i+1) begin
			fscanf(32'h8000_0000,"%b",x);
			$write("%d\n", x);
		end
	end
endmodule

stdin

01101011
10001000
10001001
10101101
00001010
00001110
11111101
10111101
00010100
00001101
11010010
11100001
11101011
00010001
01000010
00000110
01100110
01011011
10011001
11111101
01101010
00100010
11001011
11010000
00000000
00100100
01101111
10100000
00010101
10111110
10110111
10001011
00000001
01001110
11011000
00001111
10001110
00011100
10111100
00110111
01111000
01111000
10101111
11100111
10011011
00101101
00000011
10110110
01101001
10101011

stdout

stderr

/volume/CODE:5: error: Enable of unknown task ``fscanf''.
1 error(s) during elaboration.
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace