verilog, 48 bytes

Result

WA

Code [DL]

module c;real d;initial $write("%d",z);endmodule

stdin

10000110
10100101
00001010
00110111
11010010
00100100
01101001
10011001
01000001
11100000
11111011
01000010
00011100
10001000
10101011
10000101
11001111
00101101
10111110
01111000
10101101
11101001
10101111
11000011
00111101
11011111
11100111
00010101
10001001
00000110
01011011
10111100
00010011
01000110
00000011
10111101
01001110
11111101
01001110
00000100
00001111
11010101
10001000
11011000
10011101
00000000
00110101
01101111
00000101
00000001

stdout

stderr

/volume/CODE:1: error: Unable to bind wire/reg/memory `z' in `c'
1 error(s) during elaboration.
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace