verilog, 86 bytes

Result

WA

Code [DL]

module a;real x;initial while $fscanf(1<<31,"%b",x)$write(1==(8*x+1)**0.5%2);endmodule

stdin

00000010
11110100
00100100
01001100
11010010
01001110
11111101
00011001
00000111
11100111
10101010
10000000
10111011
11110111
10101011
00000011
01010000
01000010
11101111
11010010
11011010
00101101
00101110
11001110
00001111
00000001
11111000
00001010
01011011
00010101
11001101
01111000
00000000
00101101
11100001
10110111
10111110
00000110
01011000
01101001
00011100
00110111
01101011
10001000
10110110
01011110
01000011
01001000
01001101
10011001

stdout

stderr

/volume/CODE:1: syntax error
/volume/CODE:1: error: malformed statement
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace