verilog, 109 bytes

Result

WA

Code [DL]

module a;real x,y;initial repeat(50)begin
$fscanf(1<<31,"%b",x)
y=8*x**2+1
$write("%d",y%2==1)
end endmodule

stdin

01101100
10111000
11100111
11010011
00000110
10111110
11010010
00000110
10000010
01001110
01010001
00011000
10101011
00010101
10001001
00000000
01010111
10011111
01111000
10011000
11100111
01010010
10001000
00110100
00100000
01101001
10101101
00000001
11111010
00000011
11111101
01011100
00010000
00110111
00011100
01011000
10011001
11001100
10001010
00001111
01110011
00101101
00001100
00100100
01011011
01000010
00001010
11101001
01001111
00010010

stdout

stderr

/volume/CODE:3: syntax error
/volume/CODE:4: syntax error
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace