Result

AC

Code [DL]

module a;integer i,j,x,c;initial begin for(i=0;i<50;i=i+1)begin c = $fscanf(32'h8000_0000,"%b",x);for(j=0;j<=x;j=j+1) begin if (j*(j+1)/2==x) begin c = 0;end end $write("%d",1-c);end end endmodule

stdin

00000110
00001111
00110010
00101101
00001010
01101001
01011000
10001011
10110100
11010110
00100100
10011001
00011011
10111110
10000011
01000001
01001110
11100111
00110000
10010110
11000101
11110110
01011011
10110101
00110111
11101100
11000010
10001000
00010101
01111101
01000010
01101110
11111101
10111110
00011110
00011100
10100111
00000000
00001010
00000011
01000101
11010000
01111000
00001000
00011010
10010001
10101011
00000001
00111110
11010010

stdout

          1          1          0          1          1          1          0          0          0          0          1          1          0          1          0          0          1          1          0          0          0          0          1          0          1          0          0          1          1          0          1          0          1          1          0          1          0          1          1          1          0          0          1          0          0          0          1          1          0          1

stderr

strace