Result

AC

Code [DL]

module a;
integer i,j,x,c;
	initial begin
		for (i=0;i<50;i=i+1) begin
			c = $fscanf(32'h8000_0000,"%b",x);
			for(j=0;j<=x;j=j+1) begin
				if (j*(j+1)/2==x) begin
					c = 0;
				end
			end
			$write("%d",1-c);
		end
	end
endmodule

stdin

00100001
00011100
00100100
10001000
00000110
01100010
00001111
01001110
11010010
00101010
00110111
00000000
00010101
11111101
10110111
10011000
11110001
00100000
00110011
01110010
00000011
00100011
01101001
11010010
10100011
11111001
00000001
00001010
01011111
10001111
01101111
10111011
01000010
01100100
01110001
10011001
00101101
01100110
01111111
11100111
01011011
10101011
01110110
10111110
10001000
10011101
11101001
00111100
01111000
11111100

stdout

          0          1          1          1          1          0          1          1          1          0          1          1          1          1          0          0          0          0          0          0          1          0          1          1          0          0          1          1          0          0          0          0          1          0          0          1          1          0          0          1          1          1          0          1          1          0          0          0          1          0

stderr

strace