verilog, 259 bytes

Result

WA

Code [DL]

module cat;int c,i,d,s;initial begin s=1<<31; c=$fgetc(s);while(!(&c))begin d=0;while(c!=10)begin d=d*2;d=d+c-48;c=$fgetc(s);end i=1;while(d>0)begin d=d-i;i=i+1;end if(d==0)begin $write("%d ",1);end else begin $write("%d ",0);end c=$fgetc(s);end end endmodule

stdin

01110110
00000001
10101101
00001111
11110001
00000110
11010010
11100111
01100000
01101001
10001000
00101000
00011100
11111101
10110110
10110011
01111000
00101101
11011001
01000010
10010100
10111110
00001010
00100100
10011001
00000010
11100101
00000011
01001110
01001110
00010101
11000011
01010011
10100101
01011000
00010000
11011011
01011011
11010011
00101011
01010000
11000001
10001110
11001001
00110111
11111101
00000000
00100011
10101011
01100111

stdout

stderr

/volume/CODE:1: syntax error
/volume/CODE:1: error: Invalid module instantiation
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace