verilog, 278 bytes

Result

WA

Code [DL]

module cat;int c,i,d,s;initial begin s=32'h8000_0000; c=$fgetc(s);while(!(&c))begin d=0;i=1;while(c==48||c==49)begin d=d*2;d=d+c-48;c=$fgetc(s);end i=1;while(d>0)begin d=d-i;i=i+1;end if(d==0)begin $write("%d ",1);end else begin $write("%d ",0);end c=$fgetc(s);end end endmodule

stdin

00000001
11000010
01011011
01001110
00001010
01000010
00011100
11111101
00100100
00010101
01101110
01110111
01111000
01010101
11010000
01100111
00001100
10000111
10011001
01101111
10001001
11001000
00101101
01000111
10111110
10101100
00001111
10001111
01111111
11010111
00000110
00000001
10001000
01101001
10100001
11110011
11100111
10100100
01001001
00000000
01101000
10101011
01001110
00001110
00000011
11011111
11000111
11011011
00110111
11010010

stdout

stderr

/volume/CODE:1: syntax error
/volume/CODE:1: error: Invalid module instantiation
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace