verilog, 270 bytes

Result

WA

Code [DL]

module cat;int c,i,d,s;initial begin s=1<<31; c=$fgetc(s);while(!(&c))begin d=0;i=1;while(c==48||c==49)begin d=d*2;d=d+c-48;c=$fgetc(s);end i=1;while(d>0)begin d=d-i;i=i+1;end if(d==0)begin $write("%d ",1);end else begin $write("%d ",0);end c=$fgetc(s);end end endmodule

stdin

01001010
00111110
10010011
00001111
00001010
00111101
11010010
00010011
01000010
00100100
10011001
00110101
10100100
00000110
01111111
10101100
00000000
11101001
11100111
01001000
00011100
01111100
11100001
00000011
01001110
01011011
00101101
00010101
01010101
11111101
00110111
11011101
11011111
01110111
01111000
01001110
11000010
10101011
01101001
00010001
00001000
10011011
00000001
10101110
01000101
10111110
11101100
11010011
00001010
10001000

stdout

stderr

/volume/CODE:1: syntax error
/volume/CODE:1: error: Invalid module instantiation
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace