verilog, 491 bytes

Result

WA

Code [DL]

`define EOF 32'hFFFF_FFFF
`define STDIN 32'h8000_0000

module cat;
	integer c,i,d;
	initial begin
		c = $fgetc(`STDIN);
		i = 1;
		d = 0;
		while (c != `EOF) begin
			while ( c != 10)begin
				d = d + (c - 48) * i;
				i =  i * 2;
				c = $fgetc(`STDIN);
			end
			i = 1;
			while(d > 0)begin 
				d = d - i;
				i = i + 1;
			end
			if ( d == 0)beign
				$write("%d", 1);
		    end else begin
		    	$write("%d", 0);
		    end
			c = $fgetc(`STDIN);
			d = 0;
			i = 1;
		end
	end
endmodule

stdin

10010001
10101100
11100111
00001010
11101011
10000111
01100001
10001000
11100111
01000010
10000010
00011100
01101001
00011110
01011011
00000001
10011100
11010010
11011100
10101010
00110111
10011101
01111001
01110011
00010101
11111001
10100011
01000000
10011000
01100111
00100100
10111110
11111101
00000000
00001111
00101101
01110111
00100011
10011001
10011110
00001111
00000110
11110100
11010001
01111000
11110011
10000110
01001110
00000011
10101011

stdout

stderr

/volume/CODE:22: syntax error
/volume/CODE:22: error: malformed statement
/volume/CODE:23: syntax error
/volume/CODE:24: error: malformed statement
/volume/CODE:26: syntax error
/volume/CODE:26: error: Invalid module instantiation
/volume/CODE:27: error: Invalid module instantiation
/volume/CODE:28: error: Invalid module instantiation
I give up.
/home/esolang/bin/verilog: line 4: /tmp/code: No such file or directory
rm: cannot remove '/tmp/code': No such file or directory

strace